Regviz

Freescale Semiconductor /MKV43F15 /PWMA /SM1OCTRL

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as SM1OCTRL

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/Freescale Semiconductor/MKV43F15/PWMA/SM1OCTRL#0x0

15 1211 87 43 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (00)PWMXFS 0 (00)PWMBFS 0 (00)PWMAFS 0 (0)POLX 0 (0)POLB 0 (0)POLA 0 (PWMX_IN)PWMX_IN 0 (PWMB_IN)PWMB_IN 0 (PWMA_IN)PWMA_IN

POLX=0, PWMBFS=00, POLB=0, PWMAFS=00, POLA=0, PWMXFS=00

Description

Output Control Register

Fields

PWMXFS

PWM_X Fault State

0 (00): Output is forced to logic 0 state prior to consideration of output polarity control.

1 (01): Output is forced to logic 1 state prior to consideration of output polarity control.

2 (10): Output is tristated.

3 (11): Output is tristated.
PWMBFS

PWM_B Fault State

0 (00): Output is forced to logic 0 state prior to consideration of output polarity control.

1 (01): Output is forced to logic 1 state prior to consideration of output polarity control.

2 (10): Output is tristated.

3 (11): Output is tristated.
PWMAFS

PWM_A Fault State

0 (00): Output is forced to logic 0 state prior to consideration of output polarity control.

1 (01): Output is forced to logic 1 state prior to consideration of output polarity control.

2 (10): Output is tristated.

3 (11): Output is tristated.
POLX

PWM_X Output Polarity

0 (0): PWM_X output not inverted. A high level on the PWM_X pin represents the “on” or “active” state.

1 (1): PWM_X output inverted. A low level on the PWM_X pin represents the “on” or “active” state.
POLB

PWM_B Output Polarity

0 (0): PWM_B output not inverted. A high level on the PWM_B pin represents the “on” or “active” state.

1 (1): PWM_B output inverted. A low level on the PWM_B pin represents the “on” or “active” state.
POLA

PWM_A Output Polarity

0 (0): PWM_A output not inverted. A high level on the PWM_A pin represents the “on” or “active” state.

1 (1): PWM_A output inverted. A low level on the PWM_A pin represents the “on” or “active” state.
PWMX_IN

PWM_X Input
PWMB_IN

PWM_B Input
PWMA_IN

PWM_A Input

Links

()

Register License

Redistribution and use in source and binary forms, with or without modification,\nare permitted provided that the following conditions are met:\n o Redistributions of source code must retain the above copyright notice, this list\n of conditions and the following disclaimer.\n o Redistributions in binary form must reproduce the above copyright notice, this\n list of conditions and the following disclaimer in the documentation and/or\n other materials provided with the distribution.\n o Neither the name of Freescale Semiconductor, Inc. nor the names of its\n contributors may be used to endorse or promote products derived from this\n software without specific prior written permission.\n THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS “AS IS” AND\n ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED\n WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE\n DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR\n ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES\n (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;\n LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON\n ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT\n (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS\n SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

 ()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data